Programmable logic device PLD (Programmable Logic De-vice) is a digital circuit that can be programmed and configured by the user, and it can be used to solve different logic design problems. The PLD is composed of basic logic gate circuits, flip-flops, and internal connection circuits. It can be programmed using software and hardware (programmer) to achieve specific logic functions. Programmable logic devices have experienced the development process from PROM, PLA, PAL, GAL to CPLD and FPGA since the early 1970s, with great improvements in structure, process, integration, function, speed and flexibility And improve.
With the continuous update and replacement of digital integrated circuits, especially the emergence of programmable logic devices, the traditional digital system design methods have undergone fundamental changes. The flexibility of programmable logic devices allows hardware system designers to use a computer, a set of corresponding EDA software and programmable logic chips in the laboratory to complete digital system design and production.
1 Introduction to Max + plusⅡMax + plus Ⅱ is a fully integrated design environment that has nothing to do with the structure, allowing designers to easily design input, fast processing and device programming for various CPLD series of Altera. The Max + plusⅡ development system has powerful processing capabilities and a high degree of flexibility. Its main advantages are: structure-independent, multi-platform, rich design library, open interface, full integration, support for multiple hardware description languages ​​(HDL), etc. .
The design of the digital system adopts a top-down, coarse-to-fine, and gradually decomposed design method. The topmost circuit refers to the overall requirements of the system, and the bottommost layer is the implementation of specific logic circuits. The top-down design method gradually decomposes a complex system into several functional modules for design description, and uses the EDA software platform to automatically complete the logic synthesis and optimization of each functional module, the layout of the gate-level circuit, and then download to the hardware Realize the design in the specific design process is as follows.
1.1 Design input
Max + plusâ…¡ supports multiple design input methods, such as schematic input, waveform input, text input and their mixed input.
1.2 Design processing
After the design input is completed, use the compiler of Max + plusâ…¡ to compile, check, and modify until the design input is correct. At the same time, the input file will be simplified and optimized, and finally a programming file is generated. This is the core link of the design.
1.3 Design check
Max + plusâ…¡ provides designers with a complete check method for design simulation and timing analysis. Its purpose is to check whether the logic function of the circuit is correct, and at the same time test the delay of the target device in the worst case. The competitive risks of circuits and the timing and delay of sequential logic circuits are very important.
1. 4 device programming
After the circuit is designed and verified, the Program-mer of Max + plusâ…¡ downloads the compiled file generated by the compiler to the specific CPLD device, which realizes the physical programming of the target device.
2 Take the counter as an example to introduce the specific design methodCounter is a very commonly used sequential logic circuit. There are many types of counters, and there are many ways to implement counters. You can buy most types of mid-scale integrated counters for direct use, or you can use triggers to build counters that meet your requirements. However, the counter implemented by the above method is not flexible enough to be modified at any time and has poor versatility. Here is an implementation method based on programmable logic devices.
2.1 Design input
The principle of using principle-graph input is more suitable for people who have always used traditional design methods. The schematic input is shown in Figure 1.
The method of using hardware description language input is easier for people who have no experience in traditional design methods, and it is more convenient to modify. An implementation example of a reversible counter is given. The core part of the program is as follows:
2.2 Design processing
After the schematic or program is completed, select the device and define the pins, then compile and optimize the interface to get the programming file as shown in Figure 2.
2.3 Design inspection
After the compilation is completed, create a waveform file for simulation. Note that the waveform file needs to be saved first. The name of the saved file must be the same as the source file to simulate. The results are shown in Figure 3.
The simulation results meet the design goals and meet the design requirements. At this time, you can compile the generated *. The pof file is downloaded to the selected device for use. The device realized by the above method is very convenient to modify, only need to modify the program to recompile and download, any type of counter can be implemented in a programmable logic device.
3 ConclusionWith the rapid development of electronic technology, CPLD and FPGA devices have been able to meet the requirements of most occasions in terms of integration, function and performance (speed and reliability). It has become an inevitable trend of technological development to replace traditional standard integrated circuits, interface circuits and special integrated circuits with large-scale programmable logic devices such as CPLD and FPGA. Programmable logic devices are the fastest-growing type of devices in the logic device family. It appears to shorten the product development cycle, have good on-site flexibility, and reduce development risks. With the continuous development of technology, technology and market, the price of PLD products Will be cheaper, higher and higher integration, faster and faster, coupled with its design and development using international standards, powerful and universal EDA tools, the application prospects of programmable logic devices will be more and more broad.
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