Unveil the mystery of Altera's design tools that support OpenCL

"Heterogeneous Computation", which distributes the processing load in the program to the accelerator LSI, takes a new step. In 2013, Altera Corporation of the United States will begin to provide ordinary users with the tool "Altera SDK for OpenCL" which can automatically generate FPGA-specific circuits by programs written in the Heterogeneous Computing Standard "Open-CL".

The environment in which microprocessors (CPUs), graphics processing units (GPUs), and signal processors (DSPs) are combined and used as accelerators has been continuously improved. Specifically, the Khronos Group, an industry group led by semiconductor manufacturers, has developed the OpenCL standard, and GPU manufacturer NVIDIA has provided the software development and operation environment "CUDA". In November 2012, Intel also released the first product of the Xeon Phi (development code name: KnightsCorner), an accelerator board equipped with a multi-core processor. Heterogeneous computing using different architecture processors according to usage is steadily spreading. The FPGA board supported by the SDK for OpenCL is shown below, Nallatech's products (top) and BitWare's products (below)

The FPGA board supported by the SDK for OpenCL is shown below, Nallatech's products (top) and BitWare's products (below)

Program generation circuit

Altera's SDK for OpenCL differs from traditional tools in that user-developed programs do not run on fixed-architecture processors, but rather generate logic on FPGAs. In terms of processing power and power consumption, it is expected to obtain performance close to that when manufacturing dedicated hardware.

Specifically, an accelerator program (referred to as a "core" program in OpenCL) in a program developed in accordance with the OpenCL standard can be converted into a logic circuit on an FPGA and output as configuration data of the FPGA (FIG. 1). At runtime, the host-side program will use the runtime library of OpenCL to require the FPGA that has been written to these configuration data for kernel processing.

The biggest advantage of this tool is that programmers can generate FPGA configuration data without knowledge of hardware design. Programs written in C can also be converted to logic on FPGAs using previously provided development tools. However, in order for the logic circuit to complete the data processing work, the CPU needs to send and receive data through some communication interface, and if the FPGA is connected to the external memory, the memory controller must also be set. Therefore, programmers need to have knowledge of system LSIs that can be designed with various peripheral circuits.

Figure 1 can automatically generate circuits in the FPGA from a C language program.

Figure 1 can automatically generate circuits in the FPGA from a C language program.

Use Altera's "SDK for OpenCL" design flow. An external device written according to the OpenCL specification can be converted into a logic circuit on the FPGA by a kernel program.

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